1. Field of the Invention
The present invention relates to a high breakdown voltage semiconductor device, and more particularly, to a semiconductor device having an isolation region of high breakdown voltage to separate a low breakdown voltage element region, and relates to a manufacturing process thereof. The present invention is particularly useful for a semiconductor device which enhances the breakdown voltage of the isolation region without impairing the characteristics of the elements in the low breakdown element region.
2. Description of the Prior Art
FIG. 12 shows a sectional view of a conventional semiconductor device including a high breakdown voltage isolation region 16 and the low breakdown voltage element region 17. The conventional semiconductor device comprises a Pxe2x88x92 semiconductor substrate 1, an n+ buried diffusion region 2, an nxe2x88x92 epitaxial layer 3, a Pxe2x88x92 diffusion region 4, a p+ diffusion region 5, an n+ diffusion region 6, a p+ diffusion region 7, an n+ diffusion region 8, a polysilicon electrode 9, an electrode 10 and a silicon oxide film 11. The nxe2x88x92 epitaxial layer 3 is formed to have a higher impurity concentration than the Pxe2x88x92 substrate 1, and the Pxe2x88x92 diffusion region 4 is formed to have a higher impurity concentration than the nxe2x88x92 epitaxial layer 3. Further, the P+ diffusion region 5 is formed to reach the substrate 1.
The high breakdown voltage isolation region 16 functions to isolate a high voltage from a high-voltage region, typically located to the right of region 16 (not shown in FIG. 12). However, high breakdown voltage elements sometimes may be integrally formed in the isolation region 16. The low breakdown voltage element region 17 is integrally formed with low breakdown voltage elements 18. Typically, the low breakdown voltage elements 18 include complementary metal oxide semiconductor (CMOS, shown in FIG. 12) and bipolar (BIP) elements, while high breakdown voltage elements in the isolation region 16 include elements utilizing a xe2x80x9cResurfxe2x80x9d technology, (e.g., U.S. Pat. No. 4,292,642).
A problem with the above-described conventional configuration lies in that, when the resurf technology is employed to obtain high breakdown voltage, the product of thickness of the epitaxial layer 3 (unit: cm) and its impurity concentration (unit: cmxe2x88x923) must be 9.0xc3x971011 (unit: cmxe2x88x922) or less. When the high breakdown voltage isolation region 16 and the low breakdown voltage element region 17 are simultaneously formed within the range of thickness of the epitaxial layer 3 under such a restriction, the characteristics of the low breakdown voltage element 18 may be affected adversely.
FIG. 13 shows a correlation between a breakdown voltage of the high breakdown voltage isolation region 16 and of the low breakdown voltage element 18 of the conventional structure, and the thickness of the epitaxial layer 3. The abscissa (i.e., X-axis) represents the thickness of the epitaxial layer 3, and the ordinate (i.e., Y-axis) represents a magnitude of low and high breakdown voltage. As seen from FIG. 13, the thickness of the epitaxial layer 13 should be thinned to some degree to fully satisfy the characteristics of the high breakdown voltage isolation region or the high breakdown voltage element. Conversely, a second set of curves in FIG. 13 shows epitaxial layer 3 should be thickened to some degree to assure the characteristics of the low breakdown voltage element. These conflicting breakdown relationships may cause a problem in that, when the thickness of the epitaxial layer 3 is thinned to fully satisfy the characteristics of the high breakdown voltage isolation region or the high breakdown voltage element, the Pxe2x88x92 diffusion region 4, which becomes a Pxe2x88x92 back gate layer of an n-channel MOS transistor (nch MOS), will experience punch-through and thus lowering the breakdown voltage of the nch MOS. Thus, it is necessary to thicken the epitaxial layer 3 to some degree to satisfy the characteristics of the low breakdown voltage element.
Consequently, the thickness of the epitaxial layer 3 should be controlled within a very narrow range because it is necessary in the low breakdown voltage element region 17 to assure the thickness of the effective epitaxial layer 3 so not to adversely affect a characteristic of element 18, excluding the xe2x80x9cfloating upxe2x80x9d caused by n+ buried diffusion region 2 in the high breakdown voltage isolation region 16, and to maintain sufficient thickness to exhibit the resurf effect. Thus, in the conventional semiconductor device including a high breakdown voltage isolation region and a low breakdown voltage element region, it is difficult to obtain a high breakdown voltage isolation region with sufficient breakdown voltage isolation, and concurrently not to impair the characteristics of the low breakdown voltage element 18.
Accordingly, one object of this invention is to provide a novel device and process for manufacturing the device that overcomes the above-mentioned limitation of existing devices and manufacturing processes.
It is a further object of the invention to provide a semiconductor device including a high breakdown voltage isolation region and a low breakdown voltage element region, the high breakdown voltage isolation region having sufficient high breakdown voltage isolation, but not impairing the characteristics of a low breakdown voltage element in the low breakdown voltage element region, and to provide a manufacturing process therefor.
To accomplish the foregoing and other objects, and in accordance with the purposes of the present invention, a semiconductor device is provided in which a buried diffusion region of a second conductivity type (preferably, n+ type) is formed on a part of a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type). An epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) is formed in contact with the semiconductor substrate and the buried diffusion region. A high breakdown voltage isolation region is formed in the epitaxial layer and contacts the semiconductor substrate. A low breakdown voltage element region is formed on the epitaxial layer. With this configuration, a thickness of the epitaxial layer formed in contact with the semiconductor substrate is lower than where the epitaxial layer is formed in contact with the buried diffusion region.
The above invention includes, although is not limited to, the following three ways to realize the invention.
Firstly, a semiconductor device comprising a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type); a buried diffusion region of a second conductivity type (preferably, n+ type) formed on a part of a primary surface of the semiconductor substrate; an epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) formed in contact with the semiconductor substrate and the buried diffusion region, a primary surface of a portion of the epitaxial layer that is in contact with the semiconductor substrate being formed with an oxide film thereon, the oxide film being then removed therefrom; a high breakdown voltage isolation region formed on the epitaxial layer from which the oxide film is removed; and a low breakdown voltage element formed on a portion of the epitaxial layer which contacts the buried diffusion region.
Secondly, a semiconductor device comprising a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type); a buried diffusion region of a second conductivity type (preferably, n+ type) formed on a part of a primary surface of the semiconductor substrate; an epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) formed in contact with the semiconductor substrate and the buried diffusion region, a primary surface of the epitaxial layer where a portion of the epitaxial layer contacts the semiconductor substrate being selectively etched; a high breakdown voltage isolation region formed on the selectively etched epitaxial layer; and a low breakdown voltage element formed a portion of the epitaxial layer and which contacts the buried diffusion region.
Thirdly, a semiconductor device comprising a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type); a buried diffusion region of a second conductivity type (preferably, n+ type) formed on a part of a primary surface of the semiconductor substrate; an epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) formed in contact with the semiconductor substrate and the buried diffusion region, a primary surface of the epitaxial layer being selectively etched, and formed with an oxide film thereon, the oxide film being then removed therefrom; a high breakdown voltage isolation region formed on the epitaxial layer from which the oxide film is removed; and a low breakdown voltage element formed on a portion of the epitaxial layer which contacts with the buried diffusion region.
Next, another aspect of the present invention is to provide a semiconductor device which comprises a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type), and a buried diffusion region of a second conductivity type (preferably, n+ type) formed on a part of a primary surface of the semiconductor substrate. An epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) is formed in contact with the semiconductor substrate and the buried diffusion region. A high breakdown voltage isolation region is formed on a portion of the epitaxial layer that contacts the semiconductor substrate. A low breakdown voltage element region is formed on another portion of the epitaxial layer that contacts the buried diffusion region. With such a configuration, the buried diffusion region is suppressed from floating (or raising) into the epitaxial layer.
The invention also includes another four realizations. Firstly, a semiconductor device comprising a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type); a buried diffusion region of a second conductivity type (preferably, n+ type) formed on a part of a primary surface of the semiconductor substrate; a non-doped epitaxial layer formed in contact with the semiconductor substrate and the buried diffusion layer; a doped epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) formed in contact with the non-doped epitaxial layer; a high breakdown voltage isolation region formed on the doped epitaxial layer continuing from a portion of the non-doped epitaxial layer that contacts the semiconductor substrate; and a low breakdown voltage element formed on a primary surface of the doped epitaxial layer continuing from a portion of the non-doped epitaxial layer that contacts the buried diffusion region.
In this realization, the impurity concentration of the non-doped epitaxial layer is preferably one fifth or less of that of the doped epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type).
Secondly, a semiconductor device comprising a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type); a buried diffusion region of a second conductivity type (preferably, n+ type) formed on a part of a primary surface of the semiconductor substrate; an epitaxial layer of the first conductivity type (preferably, Pxe2x88x92 type) formed in contact with the semiconductor substrate and the buried diffusion layer; an epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) formed in contact with the epitaxial layer of the first conductivity type; a high breakdown voltage isolation region formed on the epitaxial layer of the second conductivity type continuing from a portion of the epitaxial layer of the first conductivity type that contacts the semiconductor substrate; and a low breakdown voltage element formed on a primary surface of the epitaxial layer of the second conductivity type continuing from a portion of the epitaxial layer of the first conductivity type that contacts the buried diffusion region.
Thirdly, a semiconductor device comprising a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type) with a primary surface into which impurities of the first conductivity type are implanted; a buried diffusion region of a second conductivity type (preferably, n+ type) formed on a part of the primary surface of the semiconductor substrate, impurities of the first conductivity type being implanted into the primary surface of the buried diffusion region; an epitaxial layer of the second conductivity type formed on the primary surface of the semiconductor substrate implanted with the impurities of the first conductivity type (preferably, Pxe2x88x92 type) and on the buried diffusion region; a high breakdown voltage isolation region formed on the primary surface of a portion of the epitaxial layer that contacts the semiconductor substrate; and a low breakdown voltage element formed on the primary surface of a portion of the epitaxial layer that contacts the buried diffusion region.
In this realization, an impurity concentration of the epitaxial layer of the second conductivity type is preferably ten times or less than ten times of that of the semiconductor substrate.
Fourthly, a semiconductor device comprising a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type); a buried diffusion region of a second conductivity type (preferably, n+ type) formed by implanting impurities of the second conductivity type into a part of a primary surface of the semiconductor substrate; an epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) formed on the semiconductor substrate and the primary surface of the buried diffusion region; a high breakdown voltage isolation region formed on a portion of the epitaxial layer that contacts the semiconductor substrate; and a low breakdown voltage element formed on the primary surface of a portion of the epitaxial layer that contacts the buried diffusion region.
Next, a semiconductor device according to another aspect of the present invention comprises a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type), and a buried diffusion region of a second conductivity type (preferably, n+ type) formed on a part of a primary surface of the semiconductor substrate. An epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) is formed in contact with the semiconductor substrate and the buried diffusion region. A high breakdown voltage isolation region is formed in a portion of the epitaxial layer that contacts the semiconductor substrate. An impurity diffusion region of the second conductivity type (preferably, nxe2x88x92 type) is formed on a primary surface of the epitaxial layer that contacts the buried diffusion region. A low breakdown voltage element is formed on a primary surface of the impurity diffusion region.
A semiconductor device according to yet another aspect of the present invention comprises a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type), and a first buried diffusion region of a second conductivity type (preferably, n+ type) formed on a first part of a primary surface of the semiconductor substrate. A second buried diffusion region of the second conductivity type (preferably, nxe2x88x92 type) is formed on a second part of the primary surface of the semiconductor substrate and has an impurity concentration lower than that of the first buried diffusion region. An epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) is formed in contact with the semiconductor substrate, the first buried diffusion region and the second buried diffusion region. A high breakdown voltage isolation region is formed on a portion of the epitaxial layer that contacts the semiconductor substrate and the first buried diffusion region. A low breakdown voltage element is formed on a portion of a primary surface of the epitaxial layer that contacts the second buried diffusion region.
The semiconductor device according to still another aspect of the present invention comprises a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type), and a first buried diffusion region of a second conductivity type (preferably, n+ type) formed on a part of the primary surface of the semiconductor substrate. A second buried diffusion region of the second conductivity type (preferably, nxe2x88x92 type) is formed on a part of the primary surface of the semiconductor substrate and has an impurity concentration lower than that of the first buried diffusion region. An epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) is formed in contact with the semiconductor substrate, the first buried diffusion region and the second buried diffusion region. A high breakdown voltage isolation region is formed on a portion of the epitaxial layer that contacts the semiconductor substrate and the first buried diffusion region. An impurity diffusion region of the second conductivity type (preferably, nxe2x88x92 type) is formed on a portion of a primary surface of the epitaxial layer that contacts the second buried diffusion region. A low breakdown voltage element is formed on a primary surface of the impurity diffusion region.
According to an additional aspect of the present invention, a multiplicative product of a thickness of an epitaxial layer, of a semiconductor device forming the high breakdown voltage isolation region and a concentration of the epitaxial layer impurity concentration (unit: cmxe2x88x923) is 9.0xc3x971011 (unit: cmxe2x88x922) or less.
A manufacturing process for a semiconductor device according to one aspect of the present invention includes the steps of forming a buried diffusion region of a second conductivity type (preferably, n+ type) on a part of the primary surface of a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type). An epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) is formed in contact with the semiconductor substrate and the buried diffusion region, and an oxide film is formed selectively on a portion of a primary surface of a portion of the epitaxial layer that contacts the semiconductor substrate, and then the oxide is removed therefrom. A high breakdown voltage isolation region is formed in the epitaxial layer in a portion that contacts the semiconductor substrate and from which the oxide film is removed. A low breakdown voltage element is formed on the primary surface of the epitaxial layer in a portion of the layer that contacts the buried diffusion region.
A manufacturing process for a semiconductor device according to another aspect of the present invention includes the steps of forming a buried diffusion region of a second conductivity type (preferably, n+ type) on a part of a primary surface of a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type). An epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) is formed in contact with the semiconductor substrate and the buried diffusion region, and a primary surface of the epitaxial layer in a portion of the layer that is in contact with the semiconductor substrate is selectively etched. A high breakdown voltage isolation region is formed in the epitaxial layer which is in contact with the semiconductor substrate and which is selectively etched. A low breakdown voltage element is formed on the primary surface of the epitaxial layer in a portion of the layer that contacts the buried diffusion region.
A manufacturing process for a semiconductor device according to another aspect of the present invention includes the steps of forming a buried diffusion region of a second conductivity type (preferably, n+ type) on a part of a primary surface of a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type). An epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) is formed in contact with the semiconductor substrate and the buried diffusion region, and a primary surface of a portion the epitaxial layer in contact with the semiconductor substrate is selectively etched. An oxide film is formed selectively on the primary surface of a portion of the epitaxial layer that contacts the semiconductor substrate and then the film is removed. A high breakdown voltage isolation region is formed in the epitaxial layer in the portion which contacts the semiconductor substrate and from which the oxide film is removed. A low breakdown voltage element is formed on the primary surface of a portion of the epitaxial layer in contact with the buried diffusion region.
A manufacturing process for a semiconductor device according to another aspect of the present invention includes the steps of forming a buried diffusion region of a second conductivity type (preferably, n+ type) on a part of a primary surface of a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type). A non-doped epitaxial layer is formed in contact with the semiconductor substrate and the buried diffusion region. An epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) is formed in contact with the non-doped epitaxial layer. A high breakdown voltage region is formed in the epitaxial layer of the second conductivity type continuing from the non-doped epitaxial layer in a portion that contacts the semiconductor substrate. A low breakdown voltage element is formed on the primary surface of the epitaxial layer of the second conductivity type continuing from the non-doped epitaxial layer in a portion that contacts the buried diffusion region. Preferably, the impurity concentration of the non-doped epitaxial layer is one fifth, or less, than that of the epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type).
A manufacturing process for a semiconductor device according to another aspect of the present invention includes the steps of forming a buried diffusion region of a second conductivity type (preferably, n+ type) on a part of a primary surface of a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type). An epitaxial layer of a first conductivity type (preferably, Pxe2x88x92 type) is formed in contact with the semiconductor substrate and the buried diffusion region. An epitaxial layer of the second conductivity type (preferably, n type) is formed in contact with the epitaxial layer of the first conductivity type. A high breakdown voltage isolation region is formed in the epitaxial layer of the second conductivity type continuing from the epitaxial layer of the first conductivity type in a portion that contacts with the semiconductor substrate, and a low breakdown voltage element is formed on a primary surface of the epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) continuing from the epitaxial layer of the first conductivity type in a portion that contacts with the buried diffusion region.
A manufacturing process for a semiconductor device according to another aspect of the present invention includes the steps of forming a buried diffusion region of a second conductivity type (preferably, n+ type) on a part of a primary surface of a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type), and implanting impurities of the first conductivity type (preferably, P type) into a primary surface of the semiconductor substrate and a primary surface of the buried diffusion region. An epitaxial layer of the second conductivity type (preferably, n type) is formed on the primary surfaces of the semiconductor substrate and the buried diffusion region into which impurities of the first conductivity type (preferably, p type) are implanted. A high breakdown voltage isolation region is formed in a portion of the epitaxial layer that contacts with the semiconductor substrate. A low breakdown voltage element is formed on the primary surface of the epitaxial layer in a portion that contacts the buried diffusion region.
Preferably, an impurity concentration of the epitaxial layer of the second conductivity type is ten times, or less, than that of the semiconductor substrate of the first conductivity type (preferably, Pxe2x88x92 type).
A manufacturing process for a semiconductor device according to another aspect of the present invention comprises the steps of forming a buried diffusion region of a second conductivity type (preferably, n+ type) by implanting impurities of the second conductivity type into a part of a primary surface of a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type). An epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) is formed on a primary surface of the semiconductor substrate and a primary surface of the buried diffusion region. A high breakdown voltage isolation region is formed in the epitaxial layer in a portion that contacts the semiconductor substrate, and a low breakdown voltage element is formed on the primary surface of the epitaxial layer in a portion that contacts the buried diffusion region.
A manufacturing process for a semiconductor device according to another aspect of the present invention includes the steps of forming a buried diffusion region of a second conductivity type (preferably, n+ type) on a part of a primary surface of a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type). An epitaxial layer of the second conductivity type (preferably, nxe2x88x92 type) is formed in contact with the semiconductor substrate and the buried diffusion region. A high breakdown voltage isolation region is formed in the epitaxial layer in a portion that contacts the semiconductor substrate. An impurity diffusion region of the second conductivity type (preferably, n type) is formed on a primary surface of the epitaxial layer in a portion that continues from the buried diffusion region, and a low breakdown voltage element is formed on the impurity diffusion region.
A manufacturing process for a semiconductor device according to another aspect of the present invention includes the steps of forming a first buried diffusion region of a second conductivity type (preferably, nxe2x88x92 type) on a part of a primary surface of a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type). A second buried diffusion region of the second conductivity type (preferably, nxe2x88x92 type) has an impurity concentration lower than the first buried diffusion region and is formed on a part of the primary surface of the semiconductor substrate. An epitaxial layer of the second conductivity type is formed in contact with the semiconductor substrate, the first buried diffusion region and the second buried diffusion region. A high breakdown voltage isolation region is formed in a portion of the epitaxial layer contacting with the semiconductor substrate and the one buried diffusion region, and a low breakdown voltage element is formed on a primary surface of a portion of the epitaxial layer contacting with the buried diffusion region.
A manufacturing process for a semiconductor device according to another aspect of the present invention comprises the steps of forming a first buried diffusion region of a second conductivity type (preferably, nxe2x88x92 type) on a part of a primary surface of a semiconductor substrate of a first conductivity type (preferably, Pxe2x88x92 type). A second buried diffusion region of the second conductivity type having an impurity concentration lower than the first buried diffusion region and is formed on a part of a primary surface of the semiconductor substrate. An epitaxial layer of the second conductivity type is formed in contact with the semiconductor substrate, the first buried diffusion region and the second buried diffusion region. A high breakdown voltage isolation region is formed in the epitaxial layer in a portion that contacts the semiconductor substrate and the first buried diffusion region. An impurity diffusion region of the second conductivity type is formed on a primary surface of a portion of the epitaxial layer contacting with the another buried diffusion region, and a low breakdown voltage element is formed on the impurity diffusion region.
Furthermore, according to another aspect of the manufacturing processes of the present invention, a multiplicative product of a thickness (unit: cm) of a portion of epitaxial layer forming the high breakdown voltage isolation region and a concentration of the portion of the epitaxial layer impurity concentration (unit: cmxe2x88x923) is 9.0xc3x971011 (unit: cmxe2x88x922) or less.
Other objects, features and advantages of the invention will appear more fully from the following description.